SPEC REV 2026-A  ·  USF ELECTRICAL ENGINEERING

Hardening the
Physical Layer

Electrical Engineering for Critical Infrastructure.

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I design power distribution hardware, write embedded firmware for industrial sensors, and model cascading failure in critical systems — then harden the physical layer against the threat vectors that matter. Research Assistant at USF CIBR Lab. NSBE Technical Development Chair. Targeting defense and power sector roles.

Systems & Hardware → Engineering Resume
Dontavious Ellis
ENGINEER · PROFILE
Dontavious Ellis
Hardware Architect · Power Systems
USF Electrical Engineering  ·  CompTIA Security+  ·  CIBR Lab  ·  NSBE Technical Development Chair
SYSTEM STATUS
TARS Electromechanical System
ACTIVE BUILD
Infrastructure Homelab / PulseGrid AI
ACTIVE
Secure IIoT Smart Grid Edge Monitor
COMPLETE
Smart Load-Shedding Controller
COMPLETE
CIBR Lab — Human-AI Interaction Research
ONGOING
PRIMARY SYSTEMS WORK — 90%

Systems & Hardware

Power distribution, embedded firmware, electromechanical design, and infrastructure simulation — built from components, validated on the bench.

POWER SYSTEMS · EMBEDDED · COMPLETED

Secure IIoT Smart Grid
Edge Monitor

ESP32 firmware computing RMS Voltage, Current, and Power Factor with <3% error margin. FFT-based THD detection in sub-100ms sample intervals. AES-128 encryption + MQTT TLS 1.2 for NERC CIP-compliant telemetry pipeline.

ESP32 FFT · THD MQTT TLS NERC CIP AES-128
Aug 2025 – Mar 2026
View details →
POWER DISTRIBUTION · HARDWARE · COMPLETED

Smart Load-Shedding &
Power Distribution Controller

ESP32 distribution unit with ±0.5% current sensing. PWM trip-logic preventing overcurrent and maintaining system stability within 10% of peak rated capacity. Active RC filtering reduced noise (Vpp) by 35%, bench-validated with digital oscilloscopes.

PWM Trip RC Filter ±0.5% Sensing Oscilloscope
Dec 2025 – Jan 2026
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ELECTROMECHANICAL · ROBOTICS · ACTIVE

TARS — Electromechanical
Walking System

Multi-articulated walking robot on Raspberry Pi 3 + Adafruit 16-Ch PWM Servo Driver. 12V-to-6V DC-DC power regulation designed in SOLIDWORKS Electrical, managing 11.1V 1300mAh LiPo discharge profile. Python bipedal gait automation across 9 metal-gear servos.

DC-DC Reg SOLIDWORKS LiPo Mgmt 16-Ch PWM
Mar 2026 – Present
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INFRASTRUCTURE · SIMULATION · ACTIVE

Enterprise Infrastructure
Home Lab + PulseGrid AI

MATLAB load-flow simulations identifying service recovery strategies and reducing grid restoration time by 22%. PulseGrid AI models cascading failure propagation across 7 infrastructure layers, covering 500+ unique outage scenarios. Proxmox + pfSense lab environment.

MATLAB Load-Flow Cascading Failure Proxmox
Jan 2026 – Present
View details →
View All Projects
TECHNICAL SPECIFICATION

System Requirements

PARAMETER SPECIFICATION
Simulation MATLAB / Simulink · LTspice · PSpice
CAD / Design SOLIDWORKS Electrical · KiCad · AutoCAD
Measurement Digital Oscilloscopes · DMM · Spectrum Analyzer
Embedded ESP32 · Raspberry Pi · Arduino · C / Python
Power Domain AC/DC Analysis · 3-Phase · Load Flow · THD
Protocols MQTT TLS 1.2 · AES-128 · I²C · SPI · UART
Compliance NERC CIP · CompTIA Security+ · IEEE 1459
Target Sectors Defense · Power Utilities · Critical Infrastructure
DOC-REV-2026A  ·  ELECTRICAL ENGINEERING  ·  USF  ·  EXPECTED B.S. MAY 2028
CAPABILITY MATRIX

Core Competencies

Power Systems & AC/DC Analysis 88%
Embedded Firmware (ESP32 / Raspberry Pi) 85%
MATLAB / Simulink 82%
SOLIDWORKS Electrical & KiCad 78%
Electromechanical Design 80%
Infrastructure Modeling & Simulation 75%
Secure Protocol Integration (NERC CIP) 70%
Full capability profile →
RESILIENCE LAYER — 10%

Infrastructure Hardening & Resilience

The physical hardware I build has to survive adversarial conditions. This is the safety layer — security knowledge applied where it matters: at the firmware and infrastructure boundary.

FIRMWARE LAYER

Embedded Security Integration

AES-128 encryption and MQTT TLS 1.2 implemented directly on ESP32 telemetry pipelines. NERC CIP-compliant data handling architecture validated end-to-end — not bolted on after the fact.

FAILURE MODELING

Cascading Failure Analysis

PulseGrid AI simulates failure propagation across 7 infrastructure dependency layers and 500+ outage scenarios. Identifying failure vectors before they propagate is an engineering discipline, not a security one.

RESEARCH · CIBR LAB

Human-AI Interaction & OSINT

Research Assistant at USF CIBR Lab studying AI-assisted threat interfaces and digital footprint exposure. Security+ certified. The threat model informs hardware design decisions, not the other way around.

OPERATIONAL CONTEXT

Defense and utility infrastructure operates at the intersection of physical and digital threat surfaces. The security knowledge is a force-multiplier for the hardware work — not a parallel track. CompTIA Security+ (Jan 2026) · GNSI Tampa Summit 6 · CIBR Lab (2025–present).

Credentials →
TARGETING SUMMER 2027

Open to Defense & Power Sector Opportunities

EE internships in power distribution, embedded systems, and defense infrastructure. I bring hardware architecture skills with a built-in understanding of the physical threat surface. Primary window: Summer 2027. Open to conversations now.

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