Hardware builds, power systems, embedded firmware, infrastructure modeling, and lab investigations · all documented with measurable outcomes and engineering rationale.
Lab simulations are conducted in controlled environments for academic and professional development. No real systems were targeted.
ESP32 firmware with FFT-based THD detection in sub-100ms intervals, <3% RMS error margin. AES-128 + MQTT TLS 1.2 over a NERC CIP-compliant telemetry pipeline validated end-to-end.
PWM trip-logic holding system stability within 10% of peak capacity. Active RC filtering cut noise (Vpp) by 35%, bench-validated with digital oscilloscopes.
Proxmox + pfSense multi-tier lab. MATLAB load-flow simulations cut grid restoration time 22%. PulseGrid AI models cascading failure across 7 infrastructure layers across 500+ outage scenarios.
Security validation exercises conducted on isolated homelab infrastructure. Methodological documentation of network forensics and incident response workflows.
7,000+ frames and 86 TCP conversations analyzed under NIST SP 800-61. Baseline deviation, persistence artifacts, and full timeline reconstruction documented.
DVWA exploit chain: foothold, root via misconfiguration, SSH/systemd persistence, staged exfiltration. Full evidence-backed timeline reconstruction in progress.